本文主要涵蓋三種在嵌入式系統上很常見的 M.2 介面:
Socket 1 - Key ESocket 2 - Key BSocket 3 - Key M
另外,原文說明內容是基於 PCI Express M.2 Specification Revision 3.0, Version 1.2。
01 Socket 1 - Key E
Key E 常見於連接類模組,例如 Wi-Fi / Bluetooth 擴充卡。原文提到這類卡通常透過 PCIe 與 USB 連接,其它匯流排如 SDIO、I2S 是否可用,要看 COM 是否支援。
Pinout Description
| 左 Pin | 左訊號 | 右訊號 | 右 Pin |
|---|---|---|---|
| 74 | 3.3V | GND | 75 |
| 72 | 3.3V | RESERVED/REFCLKn1 | 73 |
| 70 | UIM_POWER_SRC/GPIO_1/PEWAKE1# | RESERVED/REFCLKp1 | 71 |
| 68 | UIM_POWER_SNK/CLKREQ1# | GND | 69 |
| 66 | UIM_SWP/PERST1# | RESERVED/PERn1 | 67 |
| 64 | RESERVED | RESERVED/PERp1 | 65 |
| 62 | ALERT# (I)(0/1.8 V) | GND | 63 |
| 60 | I2C_CLK (O)(0/1.8 V) | RESERVED/PETn1 | 61 |
| 58 | I2C_DATA (I/O)(0/1.8 V) | RESERVED/PETp1 | 59 |
| 56 | W_DISABLE1# (O)(0/3.3V) | GND | 57 |
| 54 | W_DISABLE2# (O)(0/3.3V) | PEWAKE0# (I/O)(0/3.3V) | 55 |
| 52 | PERST0# (O)(0/3.3V) | CLKREQ0# (I/O)(0/3.3V) | 53 |
| 50 | SUSCLK(32kHz) (O)(0/3.3V) | GND | 51 |
| 48 | COEX_TXD (O)(0/1.8V) | REFCLKn0 | 49 |
| 46 | COEX_RXD (I)(0/1.8V) | REFCLKp0 | 47 |
| 44 | COEX3 (I/O)(0/1.8V) | GND | 45 |
| 42 | VENDOR DEFINED | PERn0 | 43 |
| 40 | VENDOR DEFINED | PERp0 | 41 |
| 38 | VENDOR DEFINED | GND | 39 |
| 36 | UART RTS (O)(0/1.8V) | PETn0 | 37 |
| 34 | UART CTS (I)(0/1.8V) | PETp0 | 35 |
| 32 | UART TXD (O)(0/1.8V) | GND | 33 |
| Key E | Key E | ||
| Key E | Key E | ||
| Key E | Key E | ||
| Key E | SDIO RESET#/TX_BLANKING (O)(0/1.8V) | 23 | |
| 22 | UART RXD (I)(0/1.8V) | SDIO WAKE# (I)(0/1.8V) | 21 |
| 20 | UART WAKE# (I)(0/3.3V) | SDIO DATA3(I/O)(0/1.8V) | 19 |
| 18 | GND | SDIO DATA2(I/O)(0/1.8V) | 17 |
| 16 | LED_2# (I)(OD) | SDIO DATA1(I/O)(0/1.8V) | 15 |
| 14 | PCM_OUT/I2S SD_OUT (O)(0/1.8V) | SDIO DATA0(I/O)(0/1.8V) | 13 |
| 12 | PCM_IN/I2S SD_IN (I)(0/1.8V) | SDIO CMD(I/O)(0/1.8V) | 11 |
| 10 | PCM_SYNC/I2S WS (I/O)(0/1.8V) | SDIO CLK/SYSCLK (O)(0/1.8V) | 9 |
| 8 | PCM_CLK/I2S SCK (I/O)(0/1.8V) | GND | 7 |
| 6 | LED_1# (I)(OD) | USB_D- | 5 |
| 4 | 3.3V | USB_D+ | 3 |
| 2 | 3.3V | GND | 1 |
補充說明
M.2 Socket 1 - Key E常用在連接類應用上,例如 Wi-Fi / Bluetooth 模組。PCIe_TX+/-的 AC coupling 電容放在 COM 端,PCIe_RX+/-的 AC coupling 電容放在 M.2 擴充卡端,所以 carrier board 不需要再補這些 AC coupling 電容。CLKREQ#用來啟用 PCIe reference clock,應接到 PCIe clock buffer 的 output enable 腳位。- 因為
CLKREQ#是 M.2 擴充卡輸出的低有效、open-drain 訊號,所以 carrier board 端需要上拉電阻。
02 Socket 2 - Key B
Key B 常見於 SATA、PCIe SSD,或部分 WWAN 模組。這組 socket 的特色是有 CONFIG_0 到 CONFIG_3 四個配置腳位,可以讓系統辨識卡片期望使用哪種 host interface。
Pinout Description
| 左 Pin | 左訊號 | 右訊號 | 右 Pin |
|---|---|---|---|
| 74 | 3.3 V/VBAT | CONFIG_2 | 75 |
| 72 | 3.3 V/VBAT | GND | 73 |
| 70 | 3.3 V/VBAT | GND | 71 |
| 68 | SUSCLK(32kHz) (O)(0/3.3V) | CONFIG_1 | 69 |
| 66 | SIM DETECT (O) | RESET# (O)(0/1.8V) | 67 |
| 64 | COEX_RXD (I)(0/1.8V) | ANTCTL3 (I)(0/1.8V) | 65 |
| 62 | COEX_TXD (O)(0/1.8V) | ANTCTL2 (I)(0/1.8V) | 63 |
| 60 | COEX3 (I/O)(0/1.8V) | ANTCTL1 (I)(0/1.8V) | 61 |
| 58 | NC | ANTCTL0 (I)(0/1.8V) | 59 |
| 56 | NC | GND | 57 |
| 54 | PEWAKE# (I/O)(0/3.3V) | REFCLKp | 55 |
| 52 | CLKREQ# (I/O)(0/3.3V) | REFCLKn | 53 |
| 50 | PERST# (O)(0/3.3V) | GND | 51 |
| 48 | GPIO_4 (I/O)(0/1.8V) | PETp0/SATA-A+ | 49 |
| 46 | GPIO_3 (I/O)(0/1.8V) | PETn0/SATA-A- | 47 |
| 44 | GPIO_2 (I/O)/ALERT# (I)/(0/1.8V) | GND | 45 |
| 42 | GPIO_1 (I/O)/SMB_DATA (I/O)/(0/1.8V) | PERp0/SATA-B- | 43 |
| 40 | GPIO_0 (I/O)/SMB_CLK (I/O)/(0/1.8V) | PERn0/SATA-B+ | 41 |
| 38 | DEVSLP (O) | GND | 39 |
| 36 | UIM-PWR (I) | PETp1/USB3.1-Tx+/SSIC-TxP | 37 |
| 34 | UIM-DATA (I/O) | PETn1/USB3.1-Tx-/SSIC-TxN | 35 |
| 32 | UIM-CLK (I) | GND | 33 |
| 30 | UIM-RESET (I) | PERp1/USB3.1-Rx+/SSIC-RxP | 31 |
| 28 | GPIO_8 (I/O) (0/1.8V) | PERn1/USB3.1-Rx-/SSIC-RxN | 29 |
| 26 | GPIO_10 (I/O) (0/1.8V) | GND | 27 |
| 24 | GPIO_7 (I/O) (0/1.8V) | DPR (O) (0/1.8V) | 25 |
| 22 | GPIO_6 (I/O)(0/1.8V) | GPIO_11 (I/O) (0/1.8V) | 23 |
| 20 | GPIO_5 (I/O)(0/1.8V) | CONFIG_0 | 21 |
| Key B | Key B | ||
| Key B | Key B | ||
| Key B | Key B | ||
| Key B | GND | 11 | |
| 10 | GPIO_9/DAS/DSS (I/O)/LED_1# (I)(0/3.3V) | USB_D- | 9 |
| 8 | W_DISABLE1# (O)(0/3.3V) | USB_D+ | 7 |
| 6 | FULL_CARD_POWER_OFF# (O)(0/1.8V or 3.3V) | GND | 5 |
| 4 | 3.3 V | GND | 3 |
| 2 | 3.3 V | CONFIG_3 | 1 |
Host Interface Configuration
原文指出,系統要讀取四個 CONFIG_X 腳位來辨識目前卡片選擇的 pinout / host interface。即使 M.2 卡尚未上電,系統也應該把這些配置腳位上拉到適當電源,確保仍可讀取狀態。
| CONFIG_0 (Pin 21) | CONFIG_1 (Pin 69) | CONFIG_2 (Pin 75) | CONFIG_3 (Pin 1) | Host Interface |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | SSD - SATA |
| 0 | 1 | 0 | 0 | SSD - PCIe |
| 0 | 0 | 1 | 0 | WWAN - PCIe (Port Configuration 0*) |
| 0 | 1 | 1 | 0 | WWAN - PCIe (Port Configuration 1*) |
| 0 | 0 | 0 | 1 | WWAN - PCIe, USB3.1 Gen1 (Port Configuration 0*) |
| 0 | 1 | 0 | 1 | WWAN - PCIe, USB3.1 Gen1 (Port Configuration 1*) |
| 0 | 0 | 1 | 1 | WWAN - PCIe, USB3.1 Gen1 (Port Configuration 2*) |
| 0 | 1 | 1 | 1 | WWAN - PCIe, USB3.1 Gen1 (Port Configuration 3*) |
| 1 | 0 | 0 | 0 | WWAN - SSIC (Port Configuration 0*) |
| 1 | 1 | 0 | 0 | WWAN - SSIC (Port Configuration 1*) |
| 1 | 0 | 1 | 0 | WWAN - SSIC (Port Configuration 2*) |
| 1 | 1 | 1 | 0 | WWAN - SSIC (Port Configuration 3*) |
| 1 | 0 | 0 | 1 | WWAN - PCIe (Port Configuration 2*) |
| 1 | 1 | 0 | 1 | WWAN - PCIe (Port Configuration 3*) |
| 1 | 0 | 1 | 1 | WWAN - PCIe, USB3.1 Gen1 (vendor defined) |
| 1 | 1 | 1 | 1 | No Add-in Card Present |
註:不同 Port Configuration 的細節,原文建議回查 PCI Express M.2 Specification。
補充說明
Socket 2 - Key B常用來連接PCIe或SATA型儲存裝置。CONFIG_1可以用來切換 host interface:CONFIG_1 = Low時啟用SATACONFIG_1 = High時啟用PCIe- 第二條 PCIe lane 可支援像 Intel Optane 這類
PCIe x2裝置;若要真的跑x2,主機端的 PCIe lanes 也要配置成PCIe x2 link。 - 當
PCIe模式啟用時,M.2 擴充卡上不會連接CONFIG_1,因此 carrier board 端需要加上拉電阻。 - 若這個 M.2 socket 接的是
SATA儲存裝置,Pin 43要接到SATA Rx差分對的負端。 - 若這個 M.2 socket 接的是
PCIe儲存裝置,Pin 43要接到PCIe Rx差分對的正端。
03 Socket 3 - Key M
Key M 很常用來接 PCIe 或 SATA 型儲存裝置,尤其是高頻寬 SSD。與 Key B 類似,這裡也有用來選擇 host interface 的訊號,不過改成 PEDET。
Pinout Description
| 左 Pin | 左訊號 | 右訊號 | 右 Pin |
|---|---|---|---|
| 74 | 3.3 V | GND | 75 |
| 72 | 3.3 V | GND | 73 |
| 70 | 3.3 V | GND | 71 |
| 68 | SUSCLK (O)(0/3.3V) | PEDET | 69 |
| Key M | NC | 67 | |
| Key M | Key M | ||
| Key M | Key M | ||
| Key M | Key M | ||
| Key M | Key M | ||
| 58 | NC | GND | 57 |
| 56 | NC | REFCLKp | 55 |
| 54 | PEWAKE# (I/O)(0/3.3V) or NC | REFCLKn | 53 |
| 52 | CLKREQ# (I/O)(0/3.3V) or NC | GND | 51 |
| 50 | PERST# (O)(0/3.3V) or NC | PETp0/SATA-A+ | 49 |
| 48 | NC | PETn0/SATA-A- | 47 |
| 46 | NC | GND | 45 |
| 44 | ALERT# (I) (0/1.8V) | PERp0/SATA-B- | 43 |
| 42 | SMB_DATA (I/O) (0/1.8V) | PERn0/SATA-B+ | 41 |
| 40 | SMB_CLK (I/O)(0/1.8V) | GND | 39 |
| 38 | DEVSLP (O) | PETp1 | 37 |
| 36 | NC | PETn1 | 35 |
| 34 | NC | GND | 33 |
| 32 | NC | PERp1 | 31 |
| 30 | NC | PERn1 | 29 |
| 28 | NC | GND | 27 |
| 26 | NC | PETp2 | 25 |
| 24 | NC | PETn2 | 23 |
| 22 | NC | GND | 21 |
| 20 | NC | PERp2 | 19 |
| 18 | 3.3 V | PERn2 | 17 |
| 16 | 3.3 V | GND | 15 |
| 14 | 3.3 V | PETp3 | 13 |
| 12 | 3.3 V | PETn3 | 11 |
| 10 | DAS/DSS (I/O)/LED_1# (I)(0/3.3V) | GND | 9 |
| 8 | NC | PERp3 | 7 |
| 6 | NC | PERn3 | 5 |
| 4 | 3.3 V | GND | 3 |
| 2 | 3.3 V | GND | 1 |
補充說明
Socket 3 - Key M常用來連接PCIe或SATA型儲存裝置。PEDET用來選擇 host interface,而 M.2 卡會用不同接法表明模式:PEDET = Low代表啟用SATA,也就是 M.2 卡把PEDET接到GNDPEDET = High代表啟用PCIe,也就是 M.2 卡上不連接PEDET- 若要拿到最高頻寬,四條 PCIe lanes 應配置成
x4 link。 - 當
PCIe模式啟用時,M.2 擴充卡不會連接PEDET,因此 carrier board 端需要加上拉電阻。 - 若這個 socket 接的是
SATA儲存裝置,Pin 43要接到SATA Rx差分對的負端。 - 若這個 socket 接的是
PCIe儲存裝置,Pin 43要接到PCIe Rx差分對的正端。
04 快速整理
如果你只是想快速記住這篇內容的重點,可以先抓住下面幾件事:
Key E主要偏向連接類模組,例如 Wi-Fi / Bluetooth。Key B常見於 SATA / PCIe SSD,也可能出現在 WWAN 類模組。Key M主要偏向高頻寬儲存用途,常見於 PCIe SSD。Key B透過CONFIG_0 ~ CONFIG_3辨識介面配置。Key M透過PEDET辨識SATA或PCIe。CLKREQ#、CONFIG_1、PEDET這類訊號在某些模式下需要 carrier board 提供上拉。
如果後續要做 carrier board 或 socket 對接設計,建議還是把這篇整理與原始資料、PCI Express M.2 規範一起對照,尤其是 Port Configuration、PCIe lane 配置與 SATA/PCIe 共用腳位的部分。