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        <title>SATA on KnightLi Blog</title>
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        <lastBuildDate>Mon, 04 May 2026 06:02:56 +0800</lastBuildDate><atom:link href="https://www.knightli.com/en/tags/sata/index.xml" rel="self" type="application/rss+xml" /><item>
        <title>TerraMaster F2-221 NAS Backplane Pinout Notes</title>
        <link>https://www.knightli.com/en/2026/05/04/terramaster-f2-221-backplane-pinout/</link>
        <pubDate>Mon, 04 May 2026 06:02:56 +0800</pubDate>
        
        <guid>https://www.knightli.com/en/2026/05/04/terramaster-f2-221-backplane-pinout/</guid>
        <description>&lt;p&gt;This note documents the non-standard backplane connector pinout of the TerraMaster F2-221 NAS. The connector looks close to a PCIe edge connector, but it is not a standard PCIe slot. It is a custom TerraMaster backplane interface.&lt;/p&gt;
&lt;p&gt;The connector carries SATA, power, reset, and PCIe signals at the same time. Once PCIe1 x1 is confirmed usable, a custom backplane can expose an M.2 M-key slot and use an NVMe SSD as an internal system drive.&lt;/p&gt;
&lt;p&gt;The same idea also applies to the TerraMaster F2-220. Although the F2-220 and F2-221 use different platforms, a fnNAS forum test shows that F3 Backplane V1.1 can detect NVMe on the F2-220, and the NVMe drive is visible inside the OS installer. The extra work is that the old BIOS may not support booting from NVMe.&lt;/p&gt;
&lt;h2 id=&#34;summary&#34;&gt;Summary
&lt;/h2&gt;&lt;p&gt;The F2-221 backplane connector contains:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Signals for two native SATA ports&lt;/li&gt;
&lt;li&gt;12V, 5V, 3.3V, and GND&lt;/li&gt;
&lt;li&gt;SATA drive power-control related signals&lt;/li&gt;
&lt;li&gt;&lt;code&gt;PERST#&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;At least one usable PCIe Gen2 x1 signal group&lt;/li&gt;
&lt;li&gt;Partial clues for a second PCIe signal group, but not fully verified&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;PCIe1 can be used to expose an M.2 M-key NVMe slot. In testing, the NVMe drive runs at PCIe Gen2 x1, and the BIOS can detect and boot from it.&lt;/p&gt;
&lt;p&gt;F2-220 testing points in the same direction: the hardware can detect NVMe, but the BIOS boot stage may require injecting an NVMe module, and the boot entry may appear as &lt;code&gt;PATA&lt;/code&gt;.&lt;/p&gt;
&lt;h2 id=&#34;backplane-connector-pinout&#34;&gt;Backplane Connector Pinout
&lt;/h2&gt;&lt;p&gt;The connector has B/A sides. &lt;code&gt;?&lt;/code&gt; means unknown or unconnected, and &lt;code&gt;NC&lt;/code&gt; means not connected.&lt;/p&gt;
&lt;table&gt;
  &lt;thead&gt;
      &lt;tr&gt;
          &lt;th&gt;Pin&lt;/th&gt;
          &lt;th&gt;B side&lt;/th&gt;
          &lt;th&gt;A side&lt;/th&gt;
      &lt;/tr&gt;
  &lt;/thead&gt;
  &lt;tbody&gt;
      &lt;tr&gt;
          &lt;td&gt;1&lt;/td&gt;
          &lt;td&gt;12V&lt;/td&gt;
          &lt;td&gt;?&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;2&lt;/td&gt;
          &lt;td&gt;12V&lt;/td&gt;
          &lt;td&gt;12V&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;3&lt;/td&gt;
          &lt;td&gt;12V&lt;/td&gt;
          &lt;td&gt;12V&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;4&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;5&lt;/td&gt;
          &lt;td&gt;SATA1 A+&lt;/td&gt;
          &lt;td&gt;SATA1 B+&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;6&lt;/td&gt;
          &lt;td&gt;SATA1 A-&lt;/td&gt;
          &lt;td&gt;SATA1 B-&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;7&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
          &lt;td&gt;NC&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;8&lt;/td&gt;
          &lt;td&gt;5V&lt;/td&gt;
          &lt;td&gt;5V&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;9&lt;/td&gt;
          &lt;td&gt;5V&lt;/td&gt;
          &lt;td&gt;5V&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;10&lt;/td&gt;
          &lt;td&gt;?&lt;/td&gt;
          &lt;td&gt;5V&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;11&lt;/td&gt;
          &lt;td&gt;?&lt;/td&gt;
          &lt;td&gt;?&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;12&lt;/td&gt;
          &lt;td&gt;3.3V&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;13&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
          &lt;td&gt;3.3V&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;14&lt;/td&gt;
          &lt;td&gt;SATA2 A+&lt;/td&gt;
          &lt;td&gt;3.3V&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;15&lt;/td&gt;
          &lt;td&gt;SATA2 A-&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;16&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
          &lt;td&gt;SATA2 B+&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;17&lt;/td&gt;
          &lt;td&gt;PERST#&lt;/td&gt;
          &lt;td&gt;SATA2 B-&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;18&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;19&lt;/td&gt;
          &lt;td&gt;PCIe1 TX+&lt;/td&gt;
          &lt;td&gt;NC&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;20&lt;/td&gt;
          &lt;td&gt;PCIe1 TX-&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;21&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
          &lt;td&gt;PCIe1 RX+&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;22&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
          &lt;td&gt;PCIe1 RX-&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;23&lt;/td&gt;
          &lt;td&gt;PCIe1 REFCLK+&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;24&lt;/td&gt;
          &lt;td&gt;PCIe1 REFCLK-&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;25&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
          &lt;td&gt;PCIe2 RX+&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;26&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
          &lt;td&gt;PCIe2 RX-&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;27&lt;/td&gt;
          &lt;td&gt;PCIe2 TX+&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;28&lt;/td&gt;
          &lt;td&gt;PCIe2 TX-&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;29&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
          &lt;td&gt;PCIe2 REFCLK+&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;30&lt;/td&gt;
          &lt;td&gt;?&lt;/td&gt;
          &lt;td&gt;PCIe2 REFCLK-&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;31&lt;/td&gt;
          &lt;td&gt;?&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;32&lt;/td&gt;
          &lt;td&gt;GND&lt;/td&gt;
          &lt;td&gt;?&lt;/td&gt;
      &lt;/tr&gt;
  &lt;/tbody&gt;
&lt;/table&gt;
&lt;p&gt;PCIe1 has higher practical reference value. PCIe2 is not fully verified and should only be treated as a clue, not a reliable design basis.&lt;/p&gt;
&lt;p&gt;&lt;img src=&#34;https://www.knightli.com/2026/05/04/terramaster-f2-221-backplane-pinout/pinout-overview.svg&#34;
	
	
	
	loading=&#34;lazy&#34;
	
		alt=&#34;TerraMaster F2-221 backplane connector pinout overview&#34;
	
	
&gt;&lt;/p&gt;
&lt;h2 id=&#34;signal-source-reasoning&#34;&gt;Signal Source Reasoning
&lt;/h2&gt;&lt;p&gt;The stock F2-221 dual-bay backplane does not include a PCIe-to-SATA controller. SATA signals go directly from the motherboard connector into the backplane. The extra PCIe signals are mainly inferred from other multi-bay models in the same product family.&lt;/p&gt;
&lt;p&gt;The TerraMaster F5-422 backplane uses two ASMedia &lt;code&gt;ASM1061&lt;/code&gt; chips. &lt;code&gt;ASM1061&lt;/code&gt; is a PCIe Gen2 x1 to dual-SATA controller. Combined with the Intel J3355 having 2 SATA ports and 6 PCIe Gen2 lanes, this suggests that multi-bay models expand SATA ports through PCIe.&lt;/p&gt;
&lt;p&gt;Therefore, it is reasonable for the F2-221 motherboard connector to retain PCIe signals. The vendor likely reuses motherboard designs across models with different bay counts and changes functionality through the backplane.&lt;/p&gt;
&lt;h2 id=&#34;pcie-differential-pair-identification&#34;&gt;PCIe Differential Pair Identification
&lt;/h2&gt;&lt;p&gt;PCIe differential pairs often go into inner layers after vias, so photos alone cannot trace the complete routing. One useful rule is that, in traditional PCIe designs, TX differential pairs usually have AC coupling capacitors.&lt;/p&gt;
&lt;p&gt;The direction must be viewed in reverse:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;code&gt;TX&lt;/code&gt; from the &lt;code&gt;ASM1061&lt;/code&gt; controller&amp;rsquo;s perspective corresponds to &lt;code&gt;RX&lt;/code&gt; on the CPU or motherboard side.&lt;/li&gt;
&lt;li&gt;&lt;code&gt;RX&lt;/code&gt; from the &lt;code&gt;ASM1061&lt;/code&gt; controller&amp;rsquo;s perspective corresponds to &lt;code&gt;TX&lt;/code&gt; on the CPU or motherboard side.&lt;/li&gt;
&lt;li&gt;&lt;code&gt;REFCLK&lt;/code&gt; needs to be judged together with neighboring differential pairs and routing location.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;This kind of pinout is better treated as hardware reverse-engineering material, not as an official specification.&lt;/p&gt;
&lt;h2 id=&#34;validation&#34;&gt;Validation
&lt;/h2&gt;&lt;p&gt;F3 Backplane designs based on this pinout have completed the following validation:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;The original two SATA drive bays remain usable.&lt;/li&gt;
&lt;li&gt;PCIe1 can be routed to an M.2 M-key slot.&lt;/li&gt;
&lt;li&gt;The NVMe SSD can be detected by BIOS.&lt;/li&gt;
&lt;li&gt;The NAS can boot directly from the NVMe SSD.&lt;/li&gt;
&lt;li&gt;&lt;code&gt;btrfs scrub&lt;/code&gt; found no disk errors.&lt;/li&gt;
&lt;li&gt;The system ran from the NVMe SSD for weeks without obvious issues.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;The test NVMe SSD was a Patriot P300 128GB. &lt;code&gt;hdparm&lt;/code&gt; result:&lt;/p&gt;
&lt;div class=&#34;highlight&#34;&gt;&lt;div class=&#34;chroma&#34;&gt;
&lt;table class=&#34;lntable&#34;&gt;&lt;tr&gt;&lt;td class=&#34;lntd&#34;&gt;
&lt;pre tabindex=&#34;0&#34; class=&#34;chroma&#34;&gt;&lt;code&gt;&lt;span class=&#34;lnt&#34;&gt;1
&lt;/span&gt;&lt;span class=&#34;lnt&#34;&gt;2
&lt;/span&gt;&lt;span class=&#34;lnt&#34;&gt;3
&lt;/span&gt;&lt;/code&gt;&lt;/pre&gt;&lt;/td&gt;
&lt;td class=&#34;lntd&#34;&gt;
&lt;pre tabindex=&#34;0&#34; class=&#34;chroma&#34;&gt;&lt;code class=&#34;language-text&#34; data-lang=&#34;text&#34;&gt;&lt;span class=&#34;line&#34;&gt;&lt;span class=&#34;cl&#34;&gt;/dev/nvme0n1:
&lt;/span&gt;&lt;/span&gt;&lt;span class=&#34;line&#34;&gt;&lt;span class=&#34;cl&#34;&gt; Timing cached reads:   4554 MB in  2.00 seconds = 2279.68 MB/sec
&lt;/span&gt;&lt;/span&gt;&lt;span class=&#34;line&#34;&gt;&lt;span class=&#34;cl&#34;&gt; Timing buffered disk reads: 1222 MB in  3.00 seconds = 407.22 MB/sec
&lt;/span&gt;&lt;/span&gt;&lt;/code&gt;&lt;/pre&gt;&lt;/td&gt;&lt;/tr&gt;&lt;/table&gt;
&lt;/div&gt;
&lt;/div&gt;&lt;p&gt;This speed matches the PCIe Gen2 x1 limitation. The goal is not to fully utilize NVMe performance, but to replace an external USB SSD with an internal system drive.&lt;/p&gt;
&lt;h2 id=&#34;notes&#34;&gt;Notes
&lt;/h2&gt;&lt;p&gt;This pinout is useful as a reference for hardware reverse engineering and custom backplanes, but it should not be treated as official documentation.&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;The connector is not standard PCIe and cannot directly accept generic PCIe devices.&lt;/li&gt;
&lt;li&gt;&lt;code&gt;?&lt;/code&gt; pins are unverified and should not be connected to critical circuits casually.&lt;/li&gt;
&lt;li&gt;PCIe2 is not fully verified and carries higher risk than PCIe1.&lt;/li&gt;
&lt;li&gt;&lt;code&gt;CLKREQ&lt;/code&gt; is not fully routed like a normal M.2 design, so ASPM may not work.&lt;/li&gt;
&lt;li&gt;SATA power includes hot-swap related load switch and slow start logic; do not route only signal lines while ignoring power control.&lt;/li&gt;
&lt;li&gt;If reproducing the design, measure your own motherboard and backplane again instead of relying only on photos.&lt;/li&gt;
&lt;/ul&gt;
&lt;h2 id=&#34;related-links&#34;&gt;Related Links
&lt;/h2&gt;&lt;ul&gt;
&lt;li&gt;Original project write-up: &lt;a class=&#34;link&#34; href=&#34;https://codedbearder.com/posts/f3-backplane/&#34;  target=&#34;_blank&#34; rel=&#34;noopener&#34;
    &gt;I made a new backplane for my Terramaster F2-221 NAS&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;F3 Backplane KiCad project: &lt;a class=&#34;link&#34; href=&#34;https://github.com/arnarg/f3_backplane&#34;  target=&#34;_blank&#34; rel=&#34;noopener&#34;
    &gt;arnarg/f3_backplane&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;F3 Backplane pinout CSV: &lt;a class=&#34;link&#34; href=&#34;https://github.com/arnarg/f3_backplane/blob/main/f3_backplane.csv&#34;  target=&#34;_blank&#34; rel=&#34;noopener&#34;
    &gt;f3_backplane.csv&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;F2-220 compatibility test: &lt;a class=&#34;link&#34; href=&#34;https://club.fnnas.com/forum.php?mod=viewthread&amp;amp;tid=55589&#34;  target=&#34;_blank&#34; rel=&#34;noopener&#34;
    &gt;铁威马F2-220折腾飞牛OS过程&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
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