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        <title>PCIe on KnightLi Blog</title>
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        <lastBuildDate>Thu, 23 Apr 2026 22:22:49 +0800</lastBuildDate><atom:link href="https://www.knightli.com/en/tags/pcie/index.xml" rel="self" type="application/rss+xml" /><item>
        <title>How Intel&#39;s ATX 3.0 Design Guide Classifies PCIe Auxiliary Power Connectors for GPUs</title>
        <link>https://www.knightli.com/en/2026/04/23/intel-atx-3-pcie-gpu-aux-power-connectors/</link>
        <pubDate>Thu, 23 Apr 2026 22:22:49 +0800</pubDate>
        
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        <description>&lt;p&gt;In &lt;code&gt;ATX Version 3 Multi Rail Desktop Platform Power Supply Design Guide 2.1a&lt;/code&gt;, Intel groups the auxiliary power connectors used by &lt;code&gt;PCI Express Add-in Card&lt;/code&gt; devices into three categories:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;code&gt;PCIe 2x3&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;PCIe 2x4&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;12V-2x6&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;In practice, the most common &lt;code&gt;Add-in Card&lt;/code&gt; here is a discrete graphics card. The document also makes it clear that these connector types cover a power range from &lt;code&gt;75W&lt;/code&gt; all the way up to &lt;code&gt;600W&lt;/code&gt;.&lt;/p&gt;
&lt;h2 id=&#34;1-the-short-version-first&#34;&gt;1. The short version first
&lt;/h2&gt;&lt;p&gt;If you only want the key distinction, you can think of them like this:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;code&gt;2x3&lt;/code&gt; corresponds to the familiar GPU &lt;code&gt;6-pin&lt;/code&gt;, rated for &lt;code&gt;75W&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;2x4&lt;/code&gt; corresponds to the common GPU &lt;code&gt;8-pin&lt;/code&gt;, rated for &lt;code&gt;150W&lt;/code&gt;, and backward-compatible with &lt;code&gt;2x3&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;12V-2x6&lt;/code&gt; is the newer high-power GPU connector, with support up to &lt;code&gt;600W&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;The real dividing line is not just wattage, but also this:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;code&gt;2x3 / 2x4&lt;/code&gt; still follow the traditional auxiliary power approach&lt;/li&gt;
&lt;li&gt;&lt;code&gt;12V-2x6&lt;/code&gt; folds high-power delivery, insertion-state detection, and sideband signaling into the standard itself&lt;/li&gt;
&lt;/ul&gt;
&lt;h2 id=&#34;2-pcie-2x3-the-old-6-pin-defined-here-as-75w&#34;&gt;2. &lt;code&gt;PCIe 2x3&lt;/code&gt;: the old 6-pin, defined here as &lt;code&gt;75W&lt;/code&gt;
&lt;/h2&gt;&lt;p&gt;On this page, Intel defines the &lt;code&gt;2x3 Auxiliary Power Connector&lt;/code&gt; as an auxiliary power connector that can provide &lt;code&gt;75W&lt;/code&gt; for a PCIe add-in card.&lt;/p&gt;
&lt;p&gt;The key details include:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;The design target is &lt;code&gt;75W&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;The maximum rated value is &lt;code&gt;8.0A/pin&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;The cable gauge listed is &lt;code&gt;18 AWG&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;One &lt;code&gt;Sense&lt;/code&gt; pin needs to be tied to ground so the graphics card can detect whether a &lt;code&gt;2x3&lt;/code&gt; auxiliary power cable is connected&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;If you map it to today&amp;rsquo;s PC-building terminology, this is essentially the familiar GPU &lt;code&gt;6-pin&lt;/code&gt; auxiliary power connector.&lt;/p&gt;
&lt;h2 id=&#34;3-pcie-2x4-8-pin-150w-and-backward-compatible-with-2x3&#34;&gt;3. &lt;code&gt;PCIe 2x4&lt;/code&gt;: 8-pin, &lt;code&gt;150W&lt;/code&gt;, and backward-compatible with &lt;code&gt;2x3&lt;/code&gt;
&lt;/h2&gt;&lt;p&gt;The &lt;code&gt;2x4 Auxiliary Power Connector&lt;/code&gt; corresponds to the more common GPU &lt;code&gt;8-pin&lt;/code&gt; connector, and Intel gives it a target power level of &lt;code&gt;150W&lt;/code&gt;.&lt;/p&gt;
&lt;p&gt;There are two especially important design points here:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;A board-side &lt;code&gt;2x4&lt;/code&gt; receptacle can accept either a &lt;code&gt;2x4&lt;/code&gt; plug or a &lt;code&gt;2x3&lt;/code&gt; plug&lt;/li&gt;
&lt;li&gt;The graphics card uses &lt;code&gt;SENSE0&lt;/code&gt; and &lt;code&gt;SENSE1&lt;/code&gt; to identify which type of cable is actually plugged in&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Intel gives the following detection logic:&lt;/p&gt;
&lt;table&gt;
  &lt;thead&gt;
      &lt;tr&gt;
          &lt;th&gt;&lt;code&gt;SENSE1&lt;/code&gt;&lt;/th&gt;
          &lt;th&gt;&lt;code&gt;SENSE0&lt;/code&gt;&lt;/th&gt;
          &lt;th&gt;Meaning&lt;/th&gt;
      &lt;/tr&gt;
  &lt;/thead&gt;
  &lt;tbody&gt;
      &lt;tr&gt;
          &lt;td&gt;Ground&lt;/td&gt;
          &lt;td&gt;Ground&lt;/td&gt;
          &lt;td&gt;A &lt;code&gt;2x4&lt;/code&gt; plug is inserted, so the graphics card may draw &lt;code&gt;150W&lt;/code&gt; from the auxiliary connector&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;Open&lt;/td&gt;
          &lt;td&gt;Ground&lt;/td&gt;
          &lt;td&gt;A &lt;code&gt;2x3&lt;/code&gt; plug is inserted, so the graphics card may draw only &lt;code&gt;75W&lt;/code&gt;&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;Ground&lt;/td&gt;
          &lt;td&gt;Open&lt;/td&gt;
          &lt;td&gt;Reserved&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;Open&lt;/td&gt;
          &lt;td&gt;Open&lt;/td&gt;
          &lt;td&gt;No auxiliary power cable is connected&lt;/td&gt;
      &lt;/tr&gt;
  &lt;/tbody&gt;
&lt;/table&gt;
&lt;p&gt;So a board-side &lt;code&gt;8-pin&lt;/code&gt; is not simply &amp;ldquo;a 6-pin with two extra pins.&amp;rdquo; It also carries the power-identification logic.&lt;/p&gt;
&lt;h2 id=&#34;4-12v-2x6-the-new-high-power-connector-up-to-600w&#34;&gt;4. &lt;code&gt;12V-2x6&lt;/code&gt;: the new high-power connector, up to &lt;code&gt;600W&lt;/code&gt;
&lt;/h2&gt;&lt;p&gt;With &lt;code&gt;12V-2x6&lt;/code&gt;, the positioning changes completely. Intel directly defines it as a &lt;code&gt;12V&lt;/code&gt; power connector for PCIe add-in cards that can deliver up to &lt;code&gt;600W&lt;/code&gt;.&lt;/p&gt;
&lt;p&gt;The main points in the document include:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;code&gt;12V-2x6&lt;/code&gt; is not compatible with &lt;code&gt;2x3&lt;/code&gt; or &lt;code&gt;2x4&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;Its primary power-contact pitch is &lt;code&gt;3.0 mm&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;The contact pitch of &lt;code&gt;2x3&lt;/code&gt; and &lt;code&gt;2x4&lt;/code&gt; is larger at &lt;code&gt;4.2 mm&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;This connector uses &lt;code&gt;12&lt;/code&gt; large contacts for power delivery, plus &lt;code&gt;4&lt;/code&gt; smaller contacts for sideband signals&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Its cable requirements are also stricter than those of older connectors:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Power and ground wires use &lt;code&gt;16 AWG&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;All &lt;code&gt;12&lt;/code&gt; main power pins must be fully wired, with no missing conductors&lt;/li&gt;
&lt;li&gt;Sideband signal wires use &lt;code&gt;28 AWG&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;The main power pins are rated at &lt;code&gt;9.2A/pin&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;The document also requires an &lt;code&gt;H++&lt;/code&gt; marking on the connector body to indicate support for &lt;code&gt;9.2A/pin&lt;/code&gt; or higher.&lt;/p&gt;
&lt;p&gt;&lt;img src=&#34;https://www.knightli.com/2026/04/23/intel-atx-3-pcie-gpu-aux-power-connectors/figure-5-3-12v-2x6-cable-plug.png&#34;
	width=&#34;1158&#34;
	height=&#34;524&#34;
	srcset=&#34;https://www.knightli.com/2026/04/23/intel-atx-3-pcie-gpu-aux-power-connectors/figure-5-3-12v-2x6-cable-plug_hu_d23708520107a09e.png 480w, https://www.knightli.com/2026/04/23/intel-atx-3-pcie-gpu-aux-power-connectors/figure-5-3-12v-2x6-cable-plug_hu_a33383aa87168a3.png 1024w&#34;
	loading=&#34;lazy&#34;
	
		alt=&#34;12V-2x6 Cable Plug in the Intel document&#34;
	
	
		class=&#34;gallery-image&#34; 
		data-flex-grow=&#34;220&#34;
		data-flex-basis=&#34;530px&#34;
	
&gt;&lt;/p&gt;
&lt;p&gt;The image above is &lt;code&gt;Figure 5-3&lt;/code&gt; on Intel&amp;rsquo;s page, corresponding to the &lt;code&gt;12V-2x6 Cable Plug Connector&lt;/code&gt;.&lt;/p&gt;
&lt;p&gt;&lt;img src=&#34;https://www.knightli.com/2026/04/23/intel-atx-3-pcie-gpu-aux-power-connectors/figure-5-5-12v-2x6-pcb-header.png&#34;
	width=&#34;640&#34;
	height=&#34;525&#34;
	srcset=&#34;https://www.knightli.com/2026/04/23/intel-atx-3-pcie-gpu-aux-power-connectors/figure-5-5-12v-2x6-pcb-header_hu_e5e92978e440cc9d.png 480w, https://www.knightli.com/2026/04/23/intel-atx-3-pcie-gpu-aux-power-connectors/figure-5-5-12v-2x6-pcb-header_hu_7b1a20b0ab158aa5.png 1024w&#34;
	loading=&#34;lazy&#34;
	
		alt=&#34;12V-2x6 PCB Header in the Intel document&#34;
	
	
		class=&#34;gallery-image&#34; 
		data-flex-grow=&#34;121&#34;
		data-flex-basis=&#34;292px&#34;
	
&gt;&lt;/p&gt;
&lt;p&gt;This one is &lt;code&gt;Figure 5-5&lt;/code&gt;, corresponding to the &lt;code&gt;12V-2x6 PCB Header&lt;/code&gt;. Looking at the two diagrams together, it becomes much easier to see that this is no longer the traditional &lt;code&gt;6-pin/8-pin&lt;/code&gt; connector form.&lt;/p&gt;
&lt;h2 id=&#34;5-why-12v-2x6-is-not-the-same-as-the-early-12vhpwr&#34;&gt;5. Why &lt;code&gt;12V-2x6&lt;/code&gt; is not the same as the early &lt;code&gt;12VHPWR&lt;/code&gt;
&lt;/h2&gt;&lt;p&gt;Intel includes a dedicated section in this guide called &lt;code&gt;12V-2x6 vs. 12VHPWR&lt;/code&gt;.&lt;/p&gt;
&lt;p&gt;Its conclusion is very clear:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Early &lt;code&gt;12VHPWR&lt;/code&gt; has been deprecated&lt;/li&gt;
&lt;li&gt;&lt;code&gt;PCIe CEM 5.1&lt;/code&gt; switched to &lt;code&gt;12V-2x6&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;The two look broadly similar, but the newer connector adds several reliability improvements&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;The core changes mainly fall into two groups.&lt;/p&gt;
&lt;p&gt;The first is mechanical structure:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;The main power pins are longer&lt;/li&gt;
&lt;li&gt;The sideband pins are shorter&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;The goal is to let the main power pins make contact first and break contact last, while the sideband signals only connect after the main power pins have been inserted deeply enough.&lt;/p&gt;
&lt;p&gt;The second group is updated &lt;code&gt;SENSE0 / SENSE1&lt;/code&gt; logic:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;The &lt;code&gt;150W&lt;/code&gt; level now requires &lt;code&gt;SENSE0&lt;/code&gt; and &lt;code&gt;SENSE1&lt;/code&gt; to be shorted together&lt;/li&gt;
&lt;li&gt;When both signals are in the &lt;code&gt;Open-Open&lt;/code&gt; state, the new spec defines that as &lt;code&gt;0W&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;In other words, if the plug is not fully inserted, or not inserted at all, a compliant graphics card should not draw power from that cable&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;That is also one of the reasons &lt;code&gt;12V-2x6&lt;/code&gt; is considered more conservative and more robust than the early &lt;code&gt;12VHPWR&lt;/code&gt;.&lt;/p&gt;
&lt;h2 id=&#34;6-what-do-the-four-12v-2x6-sideband-signals-do&#34;&gt;6. What do the four &lt;code&gt;12V-2x6&lt;/code&gt; sideband signals do?
&lt;/h2&gt;&lt;p&gt;On the sideband-signal page, Intel defines four signals for &lt;code&gt;12V-2x6&lt;/code&gt;:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;code&gt;SENSE0&lt;/code&gt;, required&lt;/li&gt;
&lt;li&gt;&lt;code&gt;SENSE1&lt;/code&gt;, required&lt;/li&gt;
&lt;li&gt;&lt;code&gt;CARD_PWR_STABLE&lt;/code&gt;, optional&lt;/li&gt;
&lt;li&gt;&lt;code&gt;CARD_CBL_PRES#&lt;/code&gt;, required on the graphics-card side and optional on the power-supply side&lt;/li&gt;
&lt;/ul&gt;
&lt;h3 id=&#34;1-sense0--sense1&#34;&gt;1. &lt;code&gt;SENSE0 / SENSE1&lt;/code&gt;
&lt;/h3&gt;&lt;p&gt;These two signals tell the graphics card what power level the cable and power supply currently allow.&lt;/p&gt;
&lt;p&gt;Intel provides the following power table:&lt;/p&gt;
&lt;table&gt;
  &lt;thead&gt;
      &lt;tr&gt;
          &lt;th&gt;&lt;code&gt;SENSE0&lt;/code&gt;&lt;/th&gt;
          &lt;th&gt;&lt;code&gt;SENSE1&lt;/code&gt;&lt;/th&gt;
          &lt;th style=&#34;text-align: right&#34;&gt;Initial allowed power at startup&lt;/th&gt;
          &lt;th style=&#34;text-align: right&#34;&gt;Maximum sustained power after software configuration&lt;/th&gt;
      &lt;/tr&gt;
  &lt;/thead&gt;
  &lt;tbody&gt;
      &lt;tr&gt;
          &lt;td&gt;Ground&lt;/td&gt;
          &lt;td&gt;Ground&lt;/td&gt;
          &lt;td style=&#34;text-align: right&#34;&gt;&lt;code&gt;375W&lt;/code&gt;&lt;/td&gt;
          &lt;td style=&#34;text-align: right&#34;&gt;&lt;code&gt;600W&lt;/code&gt;&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;Open&lt;/td&gt;
          &lt;td&gt;Ground&lt;/td&gt;
          &lt;td style=&#34;text-align: right&#34;&gt;&lt;code&gt;225W&lt;/code&gt;&lt;/td&gt;
          &lt;td style=&#34;text-align: right&#34;&gt;&lt;code&gt;450W&lt;/code&gt;&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;Ground&lt;/td&gt;
          &lt;td&gt;Open&lt;/td&gt;
          &lt;td style=&#34;text-align: right&#34;&gt;&lt;code&gt;150W&lt;/code&gt;&lt;/td&gt;
          &lt;td style=&#34;text-align: right&#34;&gt;&lt;code&gt;300W&lt;/code&gt;&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;Short&lt;/td&gt;
          &lt;td&gt;Short&lt;/td&gt;
          &lt;td style=&#34;text-align: right&#34;&gt;&lt;code&gt;100W&lt;/code&gt;&lt;/td&gt;
          &lt;td style=&#34;text-align: right&#34;&gt;&lt;code&gt;150W&lt;/code&gt;&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;Open&lt;/td&gt;
          &lt;td&gt;Open&lt;/td&gt;
          &lt;td style=&#34;text-align: right&#34;&gt;&lt;code&gt;0W&lt;/code&gt;&lt;/td&gt;
          &lt;td style=&#34;text-align: right&#34;&gt;&lt;code&gt;0W&lt;/code&gt;&lt;/td&gt;
      &lt;/tr&gt;
  &lt;/tbody&gt;
&lt;/table&gt;
&lt;p&gt;The key is not memorizing the table, but understanding this: &lt;code&gt;12V-2x6&lt;/code&gt; is no longer just a binary &amp;ldquo;power/no power&amp;rdquo; connector. Through sideband signals, it explicitly encodes multiple power tiers to the graphics card.&lt;/p&gt;
&lt;h3 id=&#34;2-card_pwr_stable&#34;&gt;2. &lt;code&gt;CARD_PWR_STABLE&lt;/code&gt;
&lt;/h3&gt;&lt;p&gt;This is an optional signal, and it behaves a lot like a graphics-card feedback version of &lt;code&gt;Power Good&lt;/code&gt;.&lt;/p&gt;
&lt;p&gt;Intel defines it this way:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;When the graphics card&amp;rsquo;s local critical power rails are within normal range, this signal stays open/high impedance&lt;/li&gt;
&lt;li&gt;When the graphics card detects that those local critical rails are out of range, it actively pulls the signal low&lt;/li&gt;
&lt;li&gt;If this signal is implemented, the power-supply side should pull it up to &lt;code&gt;+3.3V&lt;/code&gt; through &lt;code&gt;4.7 kOhm&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Put simply, it gives the power supply an extra fault-awareness input.&lt;/p&gt;
&lt;h3 id=&#34;3-card_cbl_pres&#34;&gt;3. &lt;code&gt;CARD_CBL_PRES#&lt;/code&gt;
&lt;/h3&gt;&lt;p&gt;This signal is more about connection detection:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;It lets the power supply know that the &lt;code&gt;12V-2x6&lt;/code&gt; cable really is connected to the graphics card and seated properly&lt;/li&gt;
&lt;li&gt;In a modular power-supply setup, it can also help confirm whether the PSU-side &lt;code&gt;12V-2x6&lt;/code&gt; cable is fully inserted&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Intel also specifically notes that:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;The graphics-card side must implement the basic logic for this signal&lt;/li&gt;
&lt;li&gt;The graphics-card side should pull it down to ground through &lt;code&gt;4.7 kOhm&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;Monitoring this signal on the power-supply side is optional&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;It is not used to determine the allowed power level. That role still belongs to &lt;code&gt;SENSE0 / SENSE1&lt;/code&gt;.&lt;/p&gt;
&lt;h2 id=&#34;7-how-to-think-about-the-relationship-between-these-three-generations-of-connectors&#34;&gt;7. How to think about the relationship between these three generations of connectors
&lt;/h2&gt;&lt;p&gt;From a PC-building and connector-recognition perspective, you can simplify them into three generations:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;code&gt;2x3&lt;/code&gt;: the old &lt;code&gt;6-pin&lt;/code&gt;, typically positioned at &lt;code&gt;75W&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;2x4&lt;/code&gt;: the old &lt;code&gt;8-pin&lt;/code&gt;, typically positioned at &lt;code&gt;150W&lt;/code&gt;, and backward-compatible with &lt;code&gt;2x3&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;12V-2x6&lt;/code&gt;: the new high-power connector, up to &lt;code&gt;600W&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Going one step further:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;code&gt;2x3 / 2x4&lt;/code&gt; still follow the traditional auxiliary power-connector model&lt;/li&gt;
&lt;li&gt;&lt;code&gt;12V-2x6&lt;/code&gt; standardizes high-power delivery, insertion state, and sideband communication together&lt;/li&gt;
&lt;li&gt;The point of &lt;code&gt;12V-2x6&lt;/code&gt; is not just higher wattage, but also stricter insertion detection and clearer power-state encoding&lt;/li&gt;
&lt;/ul&gt;
&lt;h2 id=&#34;summary&#34;&gt;Summary
&lt;/h2&gt;&lt;p&gt;From Intel&amp;rsquo;s &lt;code&gt;ATX 3.0&lt;/code&gt; design guide, PCIe auxiliary power connectors for graphics cards are already divided very clearly into three layers:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;code&gt;2x3&lt;/code&gt; corresponds to &lt;code&gt;75W&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;2x4&lt;/code&gt; corresponds to &lt;code&gt;150W&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;12V-2x6&lt;/code&gt; is aimed at up to &lt;code&gt;600W&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;And the real difference between &lt;code&gt;12V-2x6&lt;/code&gt; and the old &lt;code&gt;12VHPWR&lt;/code&gt; is not just the name or the appearance, but also:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Updated mechanical structure for the main power pins and sideband pins&lt;/li&gt;
&lt;li&gt;Revised &lt;code&gt;SENSE0 / SENSE1&lt;/code&gt; encoding rules&lt;/li&gt;
&lt;li&gt;The addition of the more conservative &lt;code&gt;Open-Open = 0W&lt;/code&gt; state&lt;/li&gt;
&lt;li&gt;More complete connection and power-state handling through &lt;code&gt;CARD_PWR_STABLE&lt;/code&gt; and &lt;code&gt;CARD_CBL_PRES#&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;If you are looking into high-power graphics cards, modular PSU cables, or simply trying to understand the relationship between &lt;code&gt;6-pin&lt;/code&gt;, &lt;code&gt;8-pin&lt;/code&gt;, and &lt;code&gt;12V-2x6&lt;/code&gt;, Intel&amp;rsquo;s official design guide already lays out the framework quite clearly.&lt;/p&gt;
&lt;h2 id=&#34;reference-links&#34;&gt;Reference Links
&lt;/h2&gt;&lt;ul&gt;
&lt;li&gt;Intel EDC: &lt;code&gt;PCI-Express (PCIe*) Add-in Card Connectors (Recommended)&lt;/code&gt;
&lt;code&gt;https://edc.intel.com/content/www/us/en/design/ipla/software-development-platforms/client/platforms/alder-lake-desktop/atx-version-3-0-multi-rail-desktop-platform-power-supply-design-guide/2.1a/pci-express-pcie-add-in-card-connectors-recommended/&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;Intel EDC: &lt;code&gt;PCIe* Add-in Card 12V-2x6 Auxiliary Power Connector Sideband Signals&lt;/code&gt;
&lt;code&gt;https://edc.intel.com/content/www/us/en/design/ipla/software-development-platforms/client/platforms/alder-lake-desktop/atx-version-3-0-multi-rail-desktop-platform-power-supply-design-guide/2.1a/pcie-add-in-card-12v-2x6-auxiliary-power-connector-sideband-signals/&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;Intel EDC: &lt;code&gt;SENSE0 &amp;amp; SENSE1 (Required)&lt;/code&gt;
&lt;code&gt;https://edc.intel.com/content/www/us/en/design/ipla/software-development-platforms/client/platforms/alder-lake-desktop/atx-version-3-0-multi-rail-desktop-platform-power-supply-design-guide/2.1a/sense0-amp-sense1-required/&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;Intel EDC: &lt;code&gt;CARD_PWR_STABLE (Optional)&lt;/code&gt;
&lt;code&gt;https://edc.intel.com/content/www/us/en/design/ipla/software-development-platforms/client/platforms/alder-lake-desktop/atx-version-3-0-multi-rail-desktop-platform-power-supply-design-guide/2.1a/card-pwr-stable-optional/&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;Intel EDC: &lt;code&gt;CARD_CBL_PRES# (Optional in Power Supply)&lt;/code&gt;
&lt;code&gt;https://edc.intel.com/content/www/us/en/design/ipla/software-development-platforms/client/platforms/alder-lake-desktop/atx-version-3-0-multi-rail-desktop-platform-power-supply-design-guide/2.1a/card-cbl-pres-optional-in-power-supply/&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;Intel EDC: &lt;code&gt;Sideband Signals DC Specifications (Required)&lt;/code&gt;
&lt;code&gt;https://edc.intel.com/content/www/us/en/design/ipla/software-development-platforms/client/platforms/alder-lake-desktop/atx-version-3-0-multi-rail-desktop-platform-power-supply-design-guide/2.1a/sideband-signals-dc-specifications-required/&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
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