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        <title>BIOS on KnightLi Blog</title>
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        <lastBuildDate>Sat, 02 May 2026 10:15:49 +0800</lastBuildDate><atom:link href="https://www.knightli.com/en/tags/bios/index.xml" rel="self" type="application/rss+xml" /><item>
        <title>A Detailed Look at PCIe Bifurcation Modes</title>
        <link>https://www.knightli.com/en/2026/05/02/pcie-bifurcation-modes/</link>
        <pubDate>Sat, 02 May 2026 10:15:49 +0800</pubDate>
        
        <guid>https://www.knightli.com/en/2026/05/02/pcie-bifurcation-modes/</guid>
        <description>&lt;p&gt;PCIe bifurcation is the process of splitting PCIe lanes. It answers a simple question: should a group of PCIe lanes from the CPU or chipset work as one wide link, or be split into multiple narrower links for different devices?&lt;/p&gt;
&lt;p&gt;For example, a group of 16 PCIe lanes can be configured as &lt;code&gt;x16&lt;/code&gt;, split into &lt;code&gt;x8+x8&lt;/code&gt;, or split into &lt;code&gt;x8+x4+x4&lt;/code&gt;. This is the basis behind a motherboard running one graphics slot at full &lt;code&gt;x16&lt;/code&gt;, two graphics slots at &lt;code&gt;x8&lt;/code&gt; each, or one graphics slot plus two CPU-attached M.2 slots.&lt;/p&gt;
&lt;h2 id=&#34;what-is-a-pcie-lane&#34;&gt;What Is a PCIe Lane
&lt;/h2&gt;&lt;p&gt;PCIe is a serial bus. Each lane consists of differential signaling pairs and can be treated as an independent high-speed data channel. Multiple lanes can be bonded together to form a wider link:&lt;/p&gt;
&lt;p&gt;&lt;img src=&#34;https://www.knightli.com/2026/05/02/pcie-bifurcation-modes/pcie-lane-link.svg&#34;
	
	
	
	loading=&#34;lazy&#34;
	
		alt=&#34;PCIe lane and link width diagram&#34;
	
	
&gt;&lt;/p&gt;
&lt;table&gt;
  &lt;thead&gt;
      &lt;tr&gt;
          &lt;th&gt;Link width&lt;/th&gt;
          &lt;th&gt;Common use&lt;/th&gt;
      &lt;/tr&gt;
  &lt;/thead&gt;
  &lt;tbody&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x1&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;Network cards, sound cards, capture cards, USB expansion cards&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x4&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;NVMe SSDs and some high-speed expansion cards&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x8&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;Secondary graphics slots, RAID cards, network cards&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x16&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;Primary graphics slot&lt;/td&gt;
      &lt;/tr&gt;
  &lt;/tbody&gt;
&lt;/table&gt;
&lt;p&gt;PCIe link widths usually grow in powers of two, so common widths are &lt;code&gt;x1&lt;/code&gt;, &lt;code&gt;x2&lt;/code&gt;, &lt;code&gt;x4&lt;/code&gt;, &lt;code&gt;x8&lt;/code&gt;, and &lt;code&gt;x16&lt;/code&gt;. On consumer motherboards, &lt;code&gt;x1&lt;/code&gt;, &lt;code&gt;x4&lt;/code&gt;, &lt;code&gt;x8&lt;/code&gt;, and &lt;code&gt;x16&lt;/code&gt; are the ones you see most often.&lt;/p&gt;
&lt;p&gt;The physical slot length is not the same as the actual link width. A long &lt;code&gt;x16&lt;/code&gt; slot may only be wired for &lt;code&gt;x4&lt;/code&gt; or &lt;code&gt;x8&lt;/code&gt;; an M.2 slot is usually &lt;code&gt;x4&lt;/code&gt;, but whether it connects to the CPU or chipset also matters.&lt;/p&gt;
&lt;h2 id=&#34;when-bifurcation-happens&#34;&gt;When Bifurcation Happens
&lt;/h2&gt;&lt;p&gt;PCIe device initialization can be roughly divided into several stages:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;Decide PCIe bifurcation, meaning how the lanes are split.&lt;/li&gt;
&lt;li&gt;Run Root Port Training to train link speed and width.&lt;/li&gt;
&lt;li&gt;Perform PCI enumeration so the system can discover devices.&lt;/li&gt;
&lt;li&gt;Configure PCIe features such as power management, error reporting, and timeout control.&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;Bifurcation happens very early. The system must first know whether a group of lanes is one &lt;code&gt;x16&lt;/code&gt;, two &lt;code&gt;x8&lt;/code&gt; links, or several &lt;code&gt;x4&lt;/code&gt; links before later Training and enumeration know how many Root Ports should be handled.&lt;/p&gt;
&lt;p&gt;When bifurcation is configured incorrectly, common symptoms include:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;An expansion card only detects one SSD.&lt;/li&gt;
&lt;li&gt;Devices disappear after a riser or adapter card is installed.&lt;/li&gt;
&lt;li&gt;A graphics card link width drops from &lt;code&gt;x16&lt;/code&gt; to &lt;code&gt;x8&lt;/code&gt;.&lt;/li&gt;
&lt;li&gt;The expected bifurcation option is missing from the BIOS.&lt;/li&gt;
&lt;li&gt;The motherboard manual says a split mode is supported, but only on a specific slot or with a specific CPU.&lt;/li&gt;
&lt;/ol&gt;
&lt;h2 id=&#34;mode-one-hard-strap&#34;&gt;Mode One: Hard Strap
&lt;/h2&gt;&lt;p&gt;Hard Strap is a hardware method. The motherboard uses fixed pins, pull-up or pull-down resistors, or wiring to determine the PCIe split mode at the hardware level.&lt;/p&gt;
&lt;p&gt;This is common for CPU-attached PCIe lanes on consumer desktop platforms. For example, if the CPU provides one group of &lt;code&gt;x16&lt;/code&gt; lanes, the motherboard vendor can design the board as:&lt;/p&gt;
&lt;table&gt;
  &lt;thead&gt;
      &lt;tr&gt;
          &lt;th&gt;Configuration&lt;/th&gt;
          &lt;th&gt;Typical use&lt;/th&gt;
      &lt;/tr&gt;
  &lt;/thead&gt;
  &lt;tbody&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x16&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;One primary graphics slot&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x8+x8&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;Two graphics slots&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x8+x4+x4&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;One graphics slot plus two CPU-attached M.2 slots&lt;/td&gt;
      &lt;/tr&gt;
  &lt;/tbody&gt;
&lt;/table&gt;
&lt;p&gt;Hard Strap is stable, simple, and low-cost. The motherboard vendor decides lane routing during PCB design, and users usually cannot freely change it in the BIOS afterward.&lt;/p&gt;
&lt;p&gt;Its downside is poor flexibility. Once the board layout is fixed, a slot designed only as &lt;code&gt;x16&lt;/code&gt; cannot become &lt;code&gt;x4+x4+x4+x4&lt;/code&gt; unless the PCB is redesigned. That is why many consumer motherboards do not expose bifurcation options in the BIOS even if the CPU theoretically supports splitting.&lt;/p&gt;
&lt;p&gt;For ordinary users, the most direct takeaway is this: whether a board supports PCIe bifurcation depends first on motherboard design, not only on CPU specifications.&lt;/p&gt;
&lt;p&gt;&lt;img src=&#34;https://www.knightli.com/2026/05/02/pcie-bifurcation-modes/image.png&#34;
	width=&#34;1008&#34;
	height=&#34;506&#34;
	srcset=&#34;https://www.knightli.com/2026/05/02/pcie-bifurcation-modes/image_hu_9da109a68bf2083b.png 480w, https://www.knightli.com/2026/05/02/pcie-bifurcation-modes/image_hu_ca9e4232e5981219.png 1024w&#34;
	loading=&#34;lazy&#34;
	
		alt=&#34;12th Gen CPU bifurcation&#34;
	
	
		class=&#34;gallery-image&#34; 
		data-flex-grow=&#34;199&#34;
		data-flex-basis=&#34;478px&#34;
	
&gt;&lt;/p&gt;
&lt;h2 id=&#34;mode-two-soft-strap&#34;&gt;Mode Two: Soft Strap
&lt;/h2&gt;&lt;p&gt;Soft Strap is a software-configured method, but it does not necessarily mean a user-facing BIOS menu option. In many cases, this configuration is stored in the BIOS image or platform description area and is set by the motherboard vendor before shipping.&lt;/p&gt;
&lt;p&gt;PCIe Root Ports under the chipset often use a similar approach. Based on the actual board routing, the vendor can configure some Root Ports as independent &lt;code&gt;x1&lt;/code&gt; ports, or combine them into &lt;code&gt;x2&lt;/code&gt; or &lt;code&gt;x4&lt;/code&gt;. These settings are usually fixed in the BIOS image and take effect during platform initialization.&lt;/p&gt;
&lt;p&gt;Soft Strap has several traits:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;Some settings can be adjusted without changing the PCB.&lt;/li&gt;
&lt;li&gt;The configuration usually takes effect during early initialization.&lt;/li&gt;
&lt;li&gt;Changes generally require reflashing the BIOS or at least rebooting.&lt;/li&gt;
&lt;li&gt;The user interface may not expose the related options.&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;This is why two motherboards with similar-looking hardware can distribute PCIe slots, M.2 slots, and onboard devices differently depending on BIOS version or vendor configuration.&lt;/p&gt;
&lt;p&gt;Soft Strap is still not magic. It can only adjust within the limits of the existing hardware routing; it cannot assign lanes to a slot that is not physically connected to them.&lt;/p&gt;
&lt;h2 id=&#34;mode-three-wait-for-bios&#34;&gt;Mode Three: Wait For BIOS
&lt;/h2&gt;&lt;p&gt;Wait For BIOS is the more flexible approach. Before PCIe Training begins, the platform waits for the BIOS to write the relevant registers, and the BIOS decides how wide each group of lanes should be.&lt;/p&gt;
&lt;p&gt;This is common on more expandable platforms, such as workstations, servers, and some Xeon platforms. These platforms provide more lanes and more complex slot combinations. If everything were fixed in hardware, motherboard adaptability would be much worse.&lt;/p&gt;
&lt;p&gt;The advantage of Wait For BIOS is flexibility:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;The BIOS can offer options such as &lt;code&gt;x16&lt;/code&gt;, &lt;code&gt;x8+x8&lt;/code&gt;, &lt;code&gt;x8+x4+x4&lt;/code&gt;, and &lt;code&gt;x4+x4+x4+x4&lt;/code&gt;.&lt;/li&gt;
&lt;li&gt;One motherboard can adapt to different expansion cards.&lt;/li&gt;
&lt;li&gt;It is better suited for multi-NVMe adapters, PCIe backplanes, and server riser cards.&lt;/li&gt;
&lt;li&gt;Users can adjust the layout based on device count and bandwidth needs.&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;The cost is that the platform and BIOS must work together. The CPU or chipset must support the desired split, the motherboard routing must match it, and the BIOS must expose or configure it. If any of those pieces is missing, users may not see usable bifurcation settings.&lt;/p&gt;
&lt;h2 id=&#34;common-split-combinations&#34;&gt;Common Split Combinations
&lt;/h2&gt;&lt;p&gt;Different platforms support different combinations, but common split modes look like this:&lt;/p&gt;
&lt;p&gt;&lt;img src=&#34;https://www.knightli.com/2026/05/02/pcie-bifurcation-modes/pcie-bifurcation-modes.svg&#34;
	
	
	
	loading=&#34;lazy&#34;
	
		alt=&#34;Common PCIe bifurcation modes&#34;
	
	
&gt;&lt;/p&gt;
&lt;table&gt;
  &lt;thead&gt;
      &lt;tr&gt;
          &lt;th&gt;Original link&lt;/th&gt;
          &lt;th&gt;Common split&lt;/th&gt;
          &lt;th&gt;Typical use&lt;/th&gt;
      &lt;/tr&gt;
  &lt;/thead&gt;
  &lt;tbody&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x16&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;&lt;code&gt;x16&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;Single graphics card&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x16&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;&lt;code&gt;x8+x8&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;Dual graphics cards, or GPU plus high-speed expansion card&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x16&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;&lt;code&gt;x8+x4+x4&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;GPU plus two NVMe SSDs&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x16&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;&lt;code&gt;x4+x4+x4+x4&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;Four-drive NVMe adapter&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x8&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;&lt;code&gt;x4+x4&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;Dual NVMe drives or dual-port high-speed expansion&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;&lt;code&gt;x4&lt;/code&gt;&lt;/td&gt;
          &lt;td&gt;&lt;code&gt;x2+x2&lt;/code&gt; or multiple &lt;code&gt;x1&lt;/code&gt; links&lt;/td&gt;
          &lt;td&gt;Less common; depends on platform support&lt;/td&gt;
      &lt;/tr&gt;
  &lt;/tbody&gt;
&lt;/table&gt;
&lt;p&gt;In DIY builds, the most common request is splitting one &lt;code&gt;x16&lt;/code&gt; slot into &lt;code&gt;x4+x4+x4+x4&lt;/code&gt; for a four-M.2 adapter card. The key detail is that cheap adapter cards without a controller chip only physically route the slot to multiple M.2 connectors. The card itself does not split PCIe lanes.&lt;/p&gt;
&lt;p&gt;If the motherboard does not support &lt;code&gt;x4+x4+x4+x4&lt;/code&gt;, such an adapter usually detects only the first SSD. To use a multi-drive card on a board without bifurcation support, you need an expansion card with a PCIe Switch chip, which costs much more.&lt;/p&gt;
&lt;h2 id=&#34;bifurcation-vs-pcie-switch&#34;&gt;Bifurcation vs PCIe Switch
&lt;/h2&gt;&lt;p&gt;Bifurcation splits existing upstream lanes into multiple downstream ports. It does not increase the number of lanes; it only changes how they are allocated.&lt;/p&gt;
&lt;p&gt;A PCIe Switch is more like a PCIe switching chip. It connects one upstream link to multiple downstream devices, so the system can see more devices. It also cannot create extra upstream bandwidth out of nothing, but it can solve the problem of attaching multiple devices when the motherboard does not support lane splitting.&lt;/p&gt;
&lt;p&gt;&lt;img src=&#34;https://www.knightli.com/2026/05/02/pcie-bifurcation-modes/pcie-switch-vs-bifurcation.svg&#34;
	
	
	
	loading=&#34;lazy&#34;
	
		alt=&#34;PCIe bifurcation versus PCIe Switch&#34;
	
	
&gt;&lt;/p&gt;
&lt;p&gt;The difference can be summarized like this:&lt;/p&gt;
&lt;table&gt;
  &lt;thead&gt;
      &lt;tr&gt;
          &lt;th&gt;Solution&lt;/th&gt;
          &lt;th&gt;Requires motherboard bifurcation support&lt;/th&gt;
          &lt;th&gt;Cost&lt;/th&gt;
          &lt;th&gt;Suitable scenario&lt;/th&gt;
      &lt;/tr&gt;
  &lt;/thead&gt;
  &lt;tbody&gt;
      &lt;tr&gt;
          &lt;td&gt;Chipless M.2 adapter&lt;/td&gt;
          &lt;td&gt;Yes&lt;/td&gt;
          &lt;td&gt;Low&lt;/td&gt;
          &lt;td&gt;Motherboard supports &lt;code&gt;x4+x4+x4+x4&lt;/code&gt;&lt;/td&gt;
      &lt;/tr&gt;
      &lt;tr&gt;
          &lt;td&gt;Expansion card with PCIe Switch&lt;/td&gt;
          &lt;td&gt;Not always&lt;/td&gt;
          &lt;td&gt;High&lt;/td&gt;
          &lt;td&gt;Board does not support splitting but needs multiple devices&lt;/td&gt;
      &lt;/tr&gt;
  &lt;/tbody&gt;
&lt;/table&gt;
&lt;p&gt;Before buying a multi-M.2 expansion card, check whether the motherboard BIOS supports the required split mode. A specification that only says “supports PCIe x16 slot” does not mean it can recognize four drives at once.&lt;/p&gt;
&lt;h2 id=&#34;buying-and-troubleshooting-advice&#34;&gt;Buying and Troubleshooting Advice
&lt;/h2&gt;&lt;p&gt;If you want to use PCIe bifurcation, check things in this order:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;Confirm that the CPU or platform supports the target split mode.&lt;/li&gt;
&lt;li&gt;Check the motherboard manual to see whether the target slot supports &lt;code&gt;x8+x8&lt;/code&gt;, &lt;code&gt;x8+x4+x4&lt;/code&gt;, or &lt;code&gt;x4+x4+x4+x4&lt;/code&gt;.&lt;/li&gt;
&lt;li&gt;Enter the BIOS and look for options such as PCIe bifurcation, PCIe lane configuration, or slot configuration.&lt;/li&gt;
&lt;li&gt;Confirm whether the expansion card is a chipless adapter or a card with a PCIe Switch.&lt;/li&gt;
&lt;li&gt;Check whether fully populating devices shares lanes with M.2, SATA, onboard networking, or other devices.&lt;/li&gt;
&lt;li&gt;After booting into the OS, use tools to inspect actual link width and device enumeration.&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;If an expansion card detects only one drive, check the BIOS split option first. If the BIOS has no related setting, it is probably not a driver issue; the motherboard is likely not splitting that group of lanes into multiple devices.&lt;/p&gt;
&lt;p&gt;If all devices are detected but speed is wrong, then check link Training. Cable quality, adapter card quality, slot routing, PCIe generation, and device compatibility can all cause a link to fall from Gen4 to Gen3, or even lower.&lt;/p&gt;
&lt;h2 id=&#34;summary&#34;&gt;Summary
&lt;/h2&gt;&lt;p&gt;PCIe bifurcation is about deciding how lanes are organized during early PCIe initialization. Hard Strap fixes the layout in hardware, Soft Strap uses platform configuration, and Wait For BIOS lets the BIOS set the mode before link training.&lt;/p&gt;
&lt;p&gt;For ordinary PC builders, the three most important conclusions are:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;A physical &lt;code&gt;x16&lt;/code&gt; slot does not necessarily split into multiple &lt;code&gt;x4&lt;/code&gt; links.&lt;/li&gt;
&lt;li&gt;Chipless multi-M.2 adapter cards depend on motherboard bifurcation support.&lt;/li&gt;
&lt;li&gt;Split support depends on the CPU, motherboard routing, and BIOS options together.&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;Once you understand these points, &lt;code&gt;x16&lt;/code&gt;, &lt;code&gt;x8+x8&lt;/code&gt;, and &lt;code&gt;x4+x4+x4+x4&lt;/code&gt; in a motherboard spec sheet stop being just slot-length labels. They become clues for judging whether the board can meet your actual expansion needs.&lt;/p&gt;
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